The trend of the design of many portable electronic devices is towards smaller devices for portability, aesthetics, and other reasons. Examples of portable electronic devices include mobile radio frequency (RF) transceivers, including cellular mobile handsets, wireless local area networks (WLAN) and the like. WLAN transceivers have recently become increasingly prevalent with the USA Federal Communications Commission's (FCC) allocation of 300 MHz bandwidth in the 5 GHz frequency band for the Unlicensed National Information Infrastructure (UNII) and with the European High Performance Radio Local Area Network Type 2 (HIPERLAN/2) system.
Traditionally, the complete RF transceiver is constructed by a number of interconnected integrated circuit (IC) dies (that are packaged in their respective IC packages) on a motherboard with passive components, and external parts: filter, and antenna (and associated shielding). The IC dies are traditionally and usually assembled in epoxy resin or in ceramic packages. In this traditional approach, the primary functions of the package are simply a means of interconnecting the integrated circuit die to the external world (the pins of the IC package) and a means of protecting the IC die for reliability.
With technological advances in IC technology, the functionality of the several IC dies in their respective IC packages and most of the passive components of the complete RF transceiver can now be realized (in part depending on the specific architecture of the RF transceiver) by a single IC die and/or packaged into a single device package. In IC fabrication technology, the downscaling of the minimum feature size of the fabrication technology allows more circuitry to be realized in a given IC die area. For some electronic systems, a complete system can be realized on a single IC, commonly known as System-on-Chip (SoC), and the complete system is packaged into a single device package. In IC packaging technology, a plurality of IC dies may be stacked and interconnected, commonly known as stacked die package using 3D packaging technologies, and/or several interconnected IC dies and passive components on a single substrate. For some electronic systems, a complete system is packaged into a single device package, commonly known as System-in-Package (SiP).
FIG. 1 depicts the functional blocks of RF Transceiver 4 that includes three separate modules: Antenna 1, Filter 2 and Radio Electronics 3. Note that Radio Electronics 3 may comprise a single or a plurality of IC packages and/or passive components, and they may be placed on a substrate and/or a printed circuit board motherboard. In traditional designs, the components in Radio Electronics are assembled on a motherboard and are connected to Filter 2 and Antenna 1. Antenna 1 and Filter 2 are usually connected by ports with a common impedance.
The bulk of Radio Electronics 3 is traditionally realized in Bipolar, Silicon-Germanium and Gallium Arsenic technologies due to their high unity gain cut-off frequency. However, with the continuing downscaling of Complementary Metal Oxide Semiconductor (CMOS) technology and for cost considerations, Radio Electronics 3 is now largely realized in CMOS. For example, deep submicron CMOS technology such as 0.18 μm or smaller dimensioned CMOS technology can be used to realize radio circuits operating in many frequencies including the 5 GHz range. As a result of continuing downscaling, the bulk of Radio Electronics 3 can now be realized by a single IC die or a plurality of IC dies in a single device package, or a single or a plurality of IC dies and passive components on a substrate in a single device package. FIG. 2 depicts this prior-art RF Transceiver 4 realization where IC Die 8 and Passive Component 7 are placed Substrate 6, all within Cavity 9 of Device Package 5. Radio Electronics 3 may comprise Substrate 6, Passive Component 7 and IC Die 8, and depending on the specific architecture of and technology used for RF Transceiver 4, Passive Component 7 and/or Substrate 6 may not be required. In some prior-art realizations, Filter 2 may also be realized on and/or embedded in Substrate 6, or it may be external to Device Package 5 as depicted in FIG. 2, or it may be integrated as part of the housing of Device Package 5 (refer to FIG. 4 later). Antenna 1, on the other hand, may be connected external to Device Package 5 as shown in FIG. 2 and/or it may be integrated as part of housing of Device Package 5 (refer to FIG. 3 later). In all prior-art designs, Antenna 1 and Filter 2 are not simultaneously realized as part of the housing of Device Package 5. These prior-art designs will now be described in some detail.
Antenna 1 is the component of the RF transceiver that radiates and/or receives the RF. In most transceivers, Antenna 1 serves as a reciprocal antenna—the same antenna serves as the radiating and as the receiving antenna. Antenna 1 is usually traditionally realized external to and separate of the other parts of RF Transceiver 4 because its properties are essentially independent thereof. The well-known antenna assemblies for transceivers include the external wire antenna (otherwise known as the whip antenna), the quarter wave straight wire antenna, the coiled quarter wave wire antenna, the Planar Inverted F Antenna (PIFA), and the patch antenna.
As abovementioned herein, a variation of prior-art designs depicted in FIG. 2 is shown in FIG. 3 where Antenna 1 is integrated into the housing of Device Package 5. This is somewhat prevalent in Bluetooth applications and the like. For example, Zhang in a paper entitled, “Integration of Microstrip Antenna on Cavity-Down Ceramic Ball Grid Array Package”, Electronics Letters, Vol. 38, No. 22, pp. 1307-1308, October 2002 (Zhang 2002a), reported the integration of a microstrip antenna within the housing (surface of top section thereof) of Device Package 5, a thin 17×17×2 mm cavity down ceramic ball grid array (BGA) package. In this prior-art design, IC Die 8 is encapsulated in Device Package 5, a BGA package. In this design as in all prior-art designs, the Filter 2 is not simultaneously realized within the housing of Device Package 5. Instead as shown in FIG. 3, Filter 2 is either realized on/embedded in Substrate 6 where IC Die 8 and/or Passive Component 7 are also attached, or it may be external to Device Package 5. In cases where Device Package 5 is a high dielectric material such as Low-Temperature Co-fired Ceramic (LTCC), IC Die 8 and/or Passive Component 7 may be attached directly to the base and/or top of Cavity 9. A layer of the housing of Package Device 5 may serve as the substrate. Cavity 9 may be filled with a resin or hermetically sealed with a sealing metal cap.
In an article by Gaynor et. al. entitled, “System-in-Package for WLAN/PAN Aids Coexistence with Digital Cellular, High Frequency Electronics, pp. 30-41, January 2003 (Gaynor et. al., 2003), Antenna 1 realized as an integrated antenna module realized within Device Package 5 was reported. This prior-art design is as that depicted in FIG. 3 and is already previously described herein. There are also several other prior-art designs reporting the same design methodology, including that involving an integrated antenna for a Bluetooth transceiver. In all these prior-art designs, Antenna 1 and Filter 2 are not simultaneously part of the housing of Device Package 5.
The filtering function of Filter 2 is usually realized by external SAW and ceramic block filter technologies. Traditionally, as explained earlier herein, Filter 2 and other filters (depending on the architecture of and technology employed for RF Transceiver 4) are usually placed on the same motherboard as Radio IC 3 (that is encapsulated in one or more IC packages). In some designs, Filter 2 may be placed on a separate motherboard. Traditional radio circuit architectures including those that are embodied in Radio IC 3 require high Q analog bandpass filters for image frequency rejection and for channel selection and these high Q analogue bandpass filters are in addition to Filter 2. More recently, architectures such as zero- or low-IF require these high Q analogue filters with less stringent requirements, allowing them to be realized on-chip in IC Die 8.
With the advances in IC packaging as discussed previously herein, Filter 2 can be realized using Passive Components 7 on/embedded in Substrate 6 where IC Die 8 is attached thereof. In the case of that embedded in Substrate 6, Substrate 6 having several layers of dielectrics and metal laminates may realize Passive Components 7, including capacitor, resistors and baluns. The common materials for Substrate 6 include BT, Getek, BT-MG and LTCC. An article by Mathews et. al. entitled, “RF System in Package: Tradeoffs Govern the Cost, Size and Performance Equation”, 2003 Chip Scale Review (Mathews et. al., 2003), describes the construction of some of these filters in Substrate 6.
As the high dielectric materials used for the housing of Device Package 5 are similar to typical substrate materials abovementioned herein, it is feasible to realize filters (previously on/embedded in Substrate 6) in the housing of Device Package 5 and Antenna 1 is external of Device Package 5. This is depicted in FIG. 4 where Filter 2 is realized in the housing of Device Package 5, IC Die 8 and Passive Component 7 are attached to Substrate 6 as shown or directly to one of the surfaces of Device Package 5 (not shown). In FIG. 4, it is possible that Filter 2 be part of any section of Device Package 5, although the top and bottom layers of Device Package 5 are prevalent.
For example, Ishizaki et.al. (Ishizaki et. al., 2003) in U.S. Pat. No. 6,456,172 described an invention where filters are realized in the bottom section of the housing of a cavity-down LTCC Device Package 5 wherein the housing having a plurality of laminated ceramic layers. Passive Components 7 and IC Die 8 may also be attached to one of the internal surfaces of the housing of Device Package 5. Note that Antenna 1 is not simultaneously realized within the housing of Device Package 5 and may be instead be realized external to Device Package 5.
In another prior-art design, Zhang in a paper entitled, “Integration of Dual-Mode RF Bandpass Filter on Ceramic Ball Grid Array Package”, Electronics Letters, Vol. 38, No. 19, pp. 1106-1107, September 2002 (Zhang 2002b), reported the integration of an RF bandpass filter (Filter 2) on the top layer of a cavity down LTCC BGA Device Package 5. IC Die 8 may be attached to one of the surfaces of Device Package 5. Note that Antenna 1 is not simultaneously realized within the housing of Device Package 5 and may instead be realized external to Device Package 5.
In another prior-art design, Hsieh et.al. in a paper entitled, “Compact-size and Low Insertaion Loss Chebychev-function Bandpass Filters using Dual-Mode Patch Resonators”, Electronics Letters, Vol. 37, No. 17, pp. 1070-1071, August 2001 (Hsieh et. al., 2001), reported a Chebychev-function bandpass using two square patch resonators, suitable as Filter 2. This filter may be realized on an appropriate high dielectric material such as LTCC or the like as abovementioned herein. In this prior-art work, the antenna was not described and is likely to be external to the device package.
The RF industry demands ever-smaller devices or equivalently, devices with a smaller form factor. As described above herein, the process of making smaller RF Transceivers 4 is essentially the process of increasing the integration density of the different sections of the RF transceiver. In most prior-art designs with a small form factor, the integration involves either realizing Antenna 1 in the housing of Device Package 5 or realizing Filter 2 (and other filters and Passive Components 7) in the housing of Device Package 5.
In the spirit of realizing RF Transceivers 4 with an even smaller form factor, it is highly desirable to have RF Transceiver 4 wherein Antenna 1 and Filter 2 (and where appropriate, other filters and Passive Components 7) are simultaneously realized in the housing of Device Package 5.